The present invention relates to a semiconductor device. It can be suitably used for, for example, semiconductor devices having MISFETs.
MISFETs each have a source region and a drain region formed in a surface layer portion of a semiconductor substrate with a space therebetween and a gate electrode formed, via a gate insulating film, on the semiconductor substrate between the source region and the drain region.
Non-patent Document 1 describes a technology relating to power devices having MOSFETs.